‘Simultaneous data’ protocol was used by Philips back in the days of TDA1540, and in fact it was the only mode the TDA1540 could operate. The TDA1541, firstly non -A, and then -A, came later, when the I2S protocol was standardized, so TDA1541(A) was I2S compatible. In addition, TDA1541(A) was also made to be compatible with previous Philips CD hardware, originally intended and designed to work with TDA1540 DAC, so TDA1541(A) can also accept said simultaneous data protocol.
All the TDA1541A DACs I made over the last ten years were normally using I2S, and the primary reason that moved me to simultaneous data mode with this DAC was its convenience when working with higher (up to 192 kHz) sampling frequencies. Simultaneous mode utilizes two separate data lines, one for each channel (it is because TDA1540 was a single DAC, so each channel necessitated its own data signal). And, because in this case two channels data are not time multiplexed in one line (as in I2S), but are running simultaneously, the frequencies used, and I mean here both master clock and bit clock, are twice lower at given sampling frequency.
Once I made this DAC to operate in simultaneous mode, and ran regular audio performance measurements, I was very surprised to see TDA1541A jitter performance better than I’ve ever seen. Of course, the clocking scheme used in the Model S USB is clean, so I expected it to be good, however one thing was beyond my expectations: for the first time in my TDA1541A journey, data related jitter artifacts disappeared completely (!).
Of course, for S/PDIF DAC one would expect and accept a certain level of data related jitter artifacts anyhow. However, I’ve been also dealing with TDA1541A within integrated CD players, and I strove on perfectly clean clocking schemes, and I even clocked TDA1541A directly from the master clock (i.e. via frequency divider only), but certain level of data related jitter artifacts always remained. The only explanation was that it was TDA1541A intrinsic jitter performance.
Now, the Model S USB appears practically free of data related jitter artifacts, and this improvement is about the TDA1541A mode of operation. And I’d have to stress that, after all the years working with TDA1541A and efforts to improve upon its jitter performance (and linearity as well), this was the first time that I found something really doing it.
The explanation (one may ask for it) would be surely associated with the different DAC output triggering schemes used in the TDA1541A I2S mode, and simultaneous data mode. The thorough explanation might take some time, but the most obvious difference is that, in I2S it is the bit clock that is also used to trigger the DAC output, whereas in simultaneous mode there is a dedicated latch enable (in place of I2S word clock, which is in this case redundant) that manages the DAC output triggering.
It might be needless to say, but to my knowledge the Model S USB is the only DAC with TDA1541A operating in simultaneous data mode.